Concepedia

K. Kajigaya

KK

Statistics

Publications

6

Citations

185

H-Index

6

Active since

1990

Affiliations

Hitachi (Japan)(Current)

K. Kajigaya is an author at Hitachi (Japan) specializing in computer engineering, engineering, and memory subsystem design.

Publications per year

1990–2005

6

Publications

6

A large-scale and low-power CAM architecture featuring a one-hot-spot block code for IP-address lookup in a network router

S. Hanzawa, Takashi Sakata, K. Kajigaya et al. · IEEE Journal of Solid-State Circuits · 2005 · 42 citations

Engineering, Computer Engineering, Computer Science +17

A 29-ns 64-Mb DRAM with hierarchical array architecture

M. Nakamura, Tsuyoshi Takahashi, T. Akiba et al. · IEEE Journal of Solid-State Circuits · 1996 · 36 citations

Engineering, Computer Engineering, Electrical Engineering +15

A low-impedance open-bitline array for multigigabit DRAM

Tomoko Sekiguchi, K. Itoh, Tsuyoshi Takahashi et al. · IEEE Journal of Solid-State Circuits · 2002 · 33 citations

Engineering, Computer Engineering, Electrical Engineering +17

A multigigabit DRAM technology with 6F/sup 2/ open-bitline cell, distributed overdriven sensing, and stacked-flash fuse

Tsuyoshi Takahashi, Tomonori Sekiguchi, R. Takemura et al. · IEEE Journal of Solid-State Circuits · 2001 · 32 citations

Engineering, Computer Engineering, Electrical Engineering +15

A tunable CMOS-DRAM voltage limiter with stabilized feedback amplifier

Masashi Horiguchi, Masashi Aoki, J. Etoh et al. · IEEE Journal of Solid-State Circuits · 1990 · 29 citations

Engineering, Computer Engineering, Electrical Engineering +14

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