A. Antreasyan

Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing

Haining Yang, R. Malik, Y. Li et al. · 2005 · 142 citations

Engineering, Electrical Engineering, Manufacturing Engineering +11

Ge<i>x</i>Si1−<i>x</i> strained-layer heterostructure bipolar transistors

H. Temkin, J. C. Bean, A. Antreasyan et al. · Applied Physics Letters · 1988 · 96 citations

Engineering, Electrical Engineering, Materials Science +17

Ge0.6Si0.4 rib waveguide avalanche photodetectors for 1.3 μm operation

H. Temkin, A. Antreasyan, N.A. Olsson et al. · Applied Physics Letters · 1986 · 73 citations

Engineering, Electrical Engineering, Materials Science +17

Ga0.47In0.53As ultrahigh gain, high sensitivity photoconductors grown by chloride vapor-phase epitaxy

A. Antreasyan, P. A. Garbinski, V. D. Mattera et al. · Journal of Applied Physics · 1986 · 36 citations

Engineering, Electrical Engineering, Materials Science +16

Electro-optic sampling measurements of high-speed InP integrated circuits

J. M. Wiesenfeld, R.S. Tucker, A. Antreasyan et al. · Applied Physics Letters · 1987 · 27 citations

Engineering, Electrical Engineering, Microelectronics +11