L. Brévard

High immunity to threshold voltage variability in undoped ultra-thin FDSOI MOSFETs and its physical understanding

O. Weber, O. Faynot, F. Andrieu et al. · 2008 · 159 citations

Engineering, Electrical Engineering, Materials Science +17

Advances, challenges and opportunities in 3D CMOS sequential integration

P. Batude, M. Vinet, B. Prévitali et al. · 2011 · 148 citations · Full text

Engineering, Materials Engineering, Materials Science +17

Planar Fully depleted SOI technology: A powerful architecture for the 20nm node and beyond

O. Faynot, F. Andrieu, O. Weber et al. · 2010 · 104 citations

Engineering, Electrical Engineering, Microelectronics +16

Low leakage and low variability Ultra-Thin Body and Buried Oxide (UT2B) SOI technology for 20nm low power CMOS and beyond

F. Andrieu, O. Weber, J. Mazurier et al. · 2010 · 103 citations

Engineering, Computer Engineering, Electrical Engineering +17

Fully-depleted SOI technology using high-k and single-metal gate for 32 nm node LSTP applications featuring 0.179 μm² 6T-SRAM bitcell

C. Fenouillet-Béranger, J. Todeschini, Jean-Christophe Le-Denmat et al. · 2007 · 61 citations

Engineering, Computer Engineering, Electrical Engineering +15