Concepedia

Y. Liu

YL

Statistics

Publications

3

Citations

71

H-Index

3

Active since

2012

Affiliations

GlobalFoundries (United States)(Current)

Y. Liu is an author at GlobalFoundries (United States) specializing in electrical engineering, microelectronics, and engineering.

Top concepts

EngineeringMicroelectronicsElectrical EngineeringVlsi DesignApplied PhysicsNanoelectronicsIntegrated CircuitsComputer EngineeringLow-power ElectronicsReliability

Publications per year

2012–2017

3

Publications

3

Impact of AC voltage stress on core NMOSFETs TDDB in FinFET and planar technologies

Rakesh Ranjan, Y. Liu, T. Nigam et al. · 2017 · 32 citations

Ac Voltage Stress, Engineering, Vlsi Design +17

High performance bulk planar 20nm CMOS technology for low power mobile applications

Huiling Shang, S. Jain, E. Josse et al. · 2012 · 26 citations

Low-power Electronics, High Density, Electrical Engineering +14

Intrinsic dielectric stack reliability of a high performance bulk planar 20nm replacement gate high-k metal gate technology and comparison to 28nm gate first high-k metal gate process

William E. McMahon, C. Tian, Suresh Uppal et al. · 2013 · 13 citations

Reliability, Electrical Engineering, Engineering +15

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