C.H. Chen

A 3nm CMOS FinFlex™ Platform Technology with Enhanced Power Efficiency and Performance for Mobile SoC and High Performance Computing Applications

Shien-Yang Wu, M.C. Chiang, C.Y. Lin et al. · 2022 International Electron Devices Meeting (IEDM) · 2022 · 49 citations

Low-power Electronics, Electrical Engineering, Cmos Platform Technology +15

A highly manufacturable 28nm CMOS low power platform technology with fully functional 64Mb SRAM using dual/tripe gate oxide process

Shien-Yang Wu, J.J. Liaw, Chih‐Yung Lin et al. · Symposium on VLSI Technology · 2006 · 42 citations

Low-power Electronics, Mb Sram Test-chip, Electrical Engineering +13

32nm gate-first high-k/metal-gate technology for high performance low power applications

C.H. Diaz, Kenichi Gotō, H.T. Huang et al. · 2008 · 36 citations

Low-power Electronics, Electrical Engineering, Semiconductor Device +14

A 90 nm CMOS MS/RF based foundry SOC technology comprising superb 185 GHz f/sub T/ RFMOS and versatile, high-Q passive components for cost/performance optimization

C.H. Chen, Chia-He Chang, C.P. Chao et al. · 2004 · 29 citations

Foundry Soc Technology, Passive Elements, Foundry 90 +16

A 32nm CMOS Low Power SoC Platform Technology for Foundry Applications with Functional High Density SRAM

Shien-Yang Wu, Chung-Cheng Chou, C.Y. Lin et al. · 2007 · 19 citations

Low-power Electronics, System On Chip, Electrical Engineering +13