IEEE Transactions on Consumer Electronics · 2025 · 24 citations · 15 references
EngineeringBiomedical EngineeringElectrical EngineeringAnalog ElectronicsBiomedical Signal ProcessingMicroelectronicsAnalog Integrated CircuitsDigital Integrated CircuitsDigital Signal ProcessingMixed-signal Integrated Circuit DesignMixed-signal IntegrationPhysiological Signal AcquisitionAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital Converter DesignAnalog-to-digital ConvertersCapacitanceCapacitance ReductionCommon-mode Voltage ReductionMatching
This paper presents a 14-bit 250-KS/s R-C hybrid calibration-free SAR ADC for the detection of physiological electrical signals in consumer electronics. This design adopts a switching scheme to control the resistive DAC (RDAC) and capacitive DAC (CDAC) to avoid the variation of the common-mode voltage. A redundant capacitance is introduced in the CDAC to suppress insufficient signal establishment during inter-stage conversion. The proposed hybrid R-C architecture in this paper can greatly reduce the matching requirement for resistive and capacitive elements while simultaneously addressing the contradiction between the conversion speed and accuracy. With the Nyquist rate input, the post-simulation results show that the effective number of bits (ENOB) is 12.65 bits, the DNL is -0.68/0.8 LSB, and the INL is -1.4/0.84 LSB.
15
A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS
Yan Zhu, Chi‐Hang Chan, U-Fat Chio et al. · IEEE Journal of Solid-State Circuits · 2010 · 713 citations
Engineering, Computer Engineering, Electrical Engineering +17
A 10b 100MS/s 1.13mW SAR ADC with binary-scaled error compensation
Chun-Cheng Liu, Soon-Jyh Chang, Guan‐Ying Huang et al. · 2010 · 310 citations