U-Fat Chio

A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS

Yan Zhu, Chi‐Hang Chan, U-Fat Chio et al. · IEEE Journal of Solid-State Circuits · 2010 · 700 citations

Low-power Electronics, V 10-Bit 100, Electrical Engineering +11

An 8-b 400-MS/s 2-b-Per-Cycle SAR ADC With Resistive DAC

He-Gong Wei, Chi‐Hang Chan, U-Fat Chio et al. · IEEE Journal of Solid-State Circuits · 2012 · 97 citations

Resistive Dac, Engineering, Calibration +10

A reconfigurable low-noise dynamic comparator with offset calibration in 90nm CMOS

Chi‐Hang Chan, Yan Zhu, U-Fat Chio et al. · 2011 · 74 citations

Offset Calibration, Analog-to-digital Converter, Low Offset +7

Split-SAR ADCs: Improved Linearity With Power and Speed Optimization

Yan Zhu, Chi‐Hang Chan, U-Fat Chio et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2013 · 67 citations

Radar, Engineering, Successive Approximation Registers +14

A 0.024mm<sup>2</sup> 8b 400MS/s SAR ADC with 2b/cycle and resistive DAC in 65nm CMOS

He-Gong Wei, Chi‐Hang Chan, U-Fat Chio et al. · 2011 · 48 citations

Resistive Dac, Engineering, Vlsi Design +19