A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS

Yan Zhu, Chi‐Hang Chan, U-Fat Chio, +4

IEEE Journal of Solid-State Circuits

Low-power ElectronicsV 10-Bit 100Electrical EngineeringEngineeringData Converter +9

An 8-b 400-MS/s 2-b-Per-Cycle SAR ADC With Resistive DAC

He-Gong Wei, Chi‐Hang Chan, U-Fat Chio, +4

IEEE Journal of Solid-State Circuits

Resistive DacEngineeringCalibrationData ConverterAnalog Design +8

A Temperature-Stabilized Single-Channel 1-GS/s 60-dB SNDR SAR-Assisted Pipelined ADC With Dynamic Gm-R-Based Amplifier

Wenning Jiang, Yan Zhu, Minglei Zhang, +2

IEEE Journal of Solid-State Circuits

Residue Amplification EfficiencyDynamic Gm-r-based AmplifierData ConverterAnalog DesignMixed-signal Integrated Circuit +4

A Two-Way Interleaved 7-b 2.4-GS/s 1-Then-2 b/Cycle SAR ADC With Background Offset Calibration

Chi‐Hang Chan, Yan Zhu, Wai-Hong Zhang, +2

IEEE Journal of Solid-State Circuits

RadarEngineeringSynthetic Aperture RadarCalibrationData Converter +10

A reconfigurable low-noise dynamic comparator with offset calibration in 90nm CMOS

Chi‐Hang Chan, Yan Zhu, U-Fat Chio, +3

Offset CalibrationAnalog-to-digital ConverterLow OffsetData ConverterMixed-signal Integrated Circuit +5

A 3.8mW 8b 1GS/s 2b/cycle interleaving SAR ADC with compact DAC structure

Chi‐Hang Chan, Yan Zhu, Sai‐Weng Sin, +2

Sar AdcHigh DensityEngineeringData ConverterCompact Dac Structure +10

Split-SAR ADCs: Improved Linearity With Power and Speed Optimization

Yan Zhu, Chi‐Hang Chan, U-Fat Chio, +4

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

RadarEngineeringSuccessive Approximation RegistersSynthetic Aperture RadarData Converter +12

A 0.6-V 13-bit 20-MS/s Two-Step TDC-Assisted SAR ADC With PVT Tracking and Speed-Enhanced Techniques

Minglei Zhang, Chi‐Hang Chan, Yan Zhu, +1

IEEE Journal of Solid-State Circuits

Speed-enhanced TechniquesData ConverterMixed-signal Integrated CircuitAnalog DesignComputer Engineering +6

An 8-Bit 10-GS/s 16× Interpolation-Based Time-Domain ADC With <1.5-ps Uncalibrated Quantization Steps

Minglei Zhang, Yan Zhu, Chi‐Hang Chan, +1

IEEE Journal of Solid-State Circuits

EngineeringData ConverterInterpolation-based Time-domain Adc8-Bit 10-Gs/s 16×Metastability Error Rate +9

60-dB SNDR 100-MS/s SAR ADCs With Threshold Reconfigurable Reference Error Calibration

Chi‐Hang Chan, Yan Zhu, Cheng Li, +5

IEEE Journal of Solid-State Circuits

EngineeringMeasurementAnalog DesignEducationReference Error +14