IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2023 · 17 citations · 30 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureParallel ComputingSystem-on-chip DesignGraphics Processing UnitsHardware AccelerationLayout OptimizationPhysical ComputingPhysical DesignVery-large-scale Integration LayoutCircuit-level OptimizationPlacementPlacement AlgorithmsPlacement ArchitecturePlacement OptimizationSolution Quality Assessment
Placement serves as a fundamental step in VLSI physical design. Recently, GPU-based placer DREAMPlace 1 demonstrated its superiority over CPU-based placers. In this work, we develop an extremely fast GPU-accelerated placer Xplace which considers factors at operator-level optimization. Xplace achieves around 2x speedup with better solution quality compared to DREAMPlace. We also plug a novel Fourier neural network into Xplace as an extension. Besides, we enable Xplace to handle the detailed-routability-driven placement problem and demonstrate its superiority in terms of quality and performance. We believe this work not only proposes an extremely fast and extensible placement framework but also illustrates a possibility of incorporating a neural network component into a GPU-accelerated analytical placer. The source code of Xplace is released on GitHub.
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Tung-Chieh Chen, Zhewei Jiang, Tien-Chang Hsu et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2008 · 344 citations
RePlAce: Advancing Solution Quality and Routability Validation in Global Placement
Chung‐Kuan Cheng, Andrew B. Kahng, Ilgweon Kang et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2018 · 234 citations
Natural Sciences, Computational Engineering, Design Optimization +14