Tung-Chieh Chen

NTUplace3: An Analytical Placer for Large-Scale Mixed-Size Designs With Preplaced Blocks and Density Constraints

Tung-Chieh Chen, Zhewei Jiang, Tien-Chang Hsu et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2008 · 334 citations

Numerical Analysis, Engineering, Accelerated Design +19

Modern floorplanning based on B/sup */-tree and fast simulated annealing

Tung-Chieh Chen, Yao‐Wen Chang · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2006 · 152 citations

Geometric Modeling, Physical Design (Electronics), Bdf Algorithm +15

NTUplace4h: A Novel Routability-Driven Placement Algorithm for Hierarchical Mixed-Size Circuit Designs

Meng-Kai Hsu, Yifang Chen, Chau-Chin Huang et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2014 · 90 citations

Engineering, Electronic Design Automation, Electronic Design +16

Modern floorplanning based on fast simulated annealing

Tung-Chieh Chen, Yao‐Wen Chang · 2005 · 85 citations

Engineering, Electronic Design Automation, Computer Architecture +17

A high-quality mixed-size analytical placer considering preplaced blocks and density constraints

Tung-Chieh Chen, Zhewei Jiang, Tien-Chang Hsu et al. · Digest of technical papers/Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design · 2006 · 80 citations

Numerical Analysis, Global Placement, Engineering +13