Chau-Chin Huang

NTUplace4h: A Novel Routability-Driven Placement Algorithm for Hierarchical Mixed-Size Circuit Designs

Meng-Kai Hsu, Yifang Chen, Chau-Chin Huang et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2014 · 90 citations

Engineering, Electronic Design Automation, Electronic Design +16

NTUplace4dr: A Detailed-Routing-Driven Placer for Mixed-Size Circuit Designs With Technology and Region Constraints

Chau-Chin Huang, Hsin-Ying Lee, Bo-Qiao Lin et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2017 · 67 citations

Cluster Computing, Engineering, Vlsi Design +27

Routability-driven placement for hierarchical mixed-size circuit designs

Meng-Kai Hsu, Yifang Chen, Chau-Chin Huang et al. · 2013 · 37 citations

Engineering, Network Routing, Computer Architecture +17

Routability-Driven Blockage-Aware Macro Placement

Yifang Chen, Chau-Chin Huang, Chien-Hsiung Chiou et al. · 2014 · 35 citations

Engineering, Electronic Design Automation, Computer Architecture +21

Clock-Aware Placement for Large-Scale Heterogeneous FPGAs

Jianli Chen, Zhifeng Lin, Yun-Chih Kuo et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2020 · 29 citations

Hardware Security, Ispd 2017, Vlsi Design +13