Digest of papers - IEEE Radio Frequency Integrated Circuits Symposium · 2007 · 10 citations · 3 references
EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesSystem-on-chip DesignChip PackagingCmos Circuit DesignElectrostatic Discharge ProtectionHigh-frequency Semiconductor DevicesIntegrated Circuit DesignPhysical DesignCapacitance ReductionElectrostatic DischargeLayout Optimization For Electrostatic DischargeOn-chip Electrostatic Discharge ProtectionParasitic CapacitanceParasitic Capacitance ReductionRf Cmos DesignSilicon
Silicon-controlled rectifier (SCR) has been used as an effective on-chip ESD protection device in CMOS technology due to the highest ESD robustness. In this work, the waffle layout structure for SCR can achieve smaller parasitic capacitance under the same ESD robustness. With smaller parasitic capacitance, the degradation on RF circuit performance due to ESD protection device can be reduced. The proposed waffle SCR with low parasitic capacitance is suitable for on-chip ESD protection in RF ICs.
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ESD protection design for 900-MHz RF receiver with 8-kV HBM ESD robustness
Ming‐Dou Ker, Wen-Yu Lo, Chien-Ming Lee et al. · 2003 · 27 citations