High RF Performance GaN-on-Si HEMTs With Passivation Implanted Termination

Abstract

This work reports recent progress in the sub-6 GHz power performance of GaN-based HEMTs grown on high resistivity silicon substrates with passivation implanted termination (PIT) process. Thanks to the mitigated electric field crowding at the gate edge and the suppressed negative fixed charge-induced carrier depletion, the fabricated HEMTs demonstrate a low leakage current, a high ON/OFF current ratio of 10⁸, and improved breakdown voltage associated with a current collapse at 40 V drain quiescent condition of as low as 5.6&#x0025;. S-band continuous-wave large signal measurements yield a high power-added efficiency (PAE) of 69&#x0025;, a drain efficiency (DE) of 72&#x0025;, and an output power density (<inline-formula> <tex-math notation="LaTeX">${P}_{\text{out}}$ </tex-math></inline-formula>) of 7.2 W/mm at <inline-formula> <tex-math notation="LaTeX">${V}_{\text{DS}}=30$ </tex-math></inline-formula> V. Moreover, the transistor delivers a maximum <inline-formula> <tex-math notation="LaTeX">${P}_{\text{out}}$ </tex-math></inline-formula> up to 10.2 W/mm with a peak PAE of 63.8&#x0025; at <inline-formula> <tex-math notation="LaTeX">${V}_{\text{DS}}=40$ </tex-math></inline-formula> V. The PAE and <inline-formula> <tex-math notation="LaTeX">${P}_{\text{out}}$ </tex-math></inline-formula> as a function of drain bias indicate that the transistors remain constant high PAE and linearly increased <inline-formula> <tex-math notation="LaTeX">${P}_{\text{out}}$ </tex-math></inline-formula> over a wide range of drain voltage variation. These excellent results have demonstrated the PIT process could be an attractive technique to facilitate the application of high-performance and cost-competitive GaN-on-Si HEMTs for 5G wireless base stations.