2019 · 37 citations · 16 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureHardware-software Co-designLow-power DesignAccelerator ArchitectureHardware AccelerationNear-threshold ComputingPower ManagementPower OptimizationPower-aware DesignAcceleratorsEnergy ConsumptionEnergy-efficient Hardware AccelerationOperating VoltagePower-efficient Accelerator DesignPower-efficient DesignSystolic Array DesignSystolic Arrays
The emergence of hardware accelerators has brought about several orders of magnitude improvement in the speed of the deep neural-network (DNN) inference. Among such DNN accelerators, Google Tensor Processing Unit (TPU) has transpired to be the best-in-class, offering more than 15× speedup over the contemporary GPUs. However, the rapid growth in several DNN workloads conspires to escalate the energy consumptions of the TPU-based data-centers. In order to restrict the energy consumption of TPUs, we propose Green TPU---a low-power near-threshold (NTC) TPU design paradigm. To ensure a high inference accuracy at a low-voltage operation, GreenTPU identifies the patterns in the error-causing activation sequences in the systolic array, and prevents further timing errors from the same sequence by intermittently boosting the operating voltage of the specific multiplier-and-accumulator units in the TPU. Compared to a cutting-edge timing error mitigation technique for TPUs, GreenTPU enables 2X--3X higher performance in an NTC TPU, with a minimal loss in the prediction accuracy.
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In-Datacenter Performance Analysis of a Tensor Processing Unit
Norman P. Jouppi, Cliff Young, Nishant Patil et al. · 2017 · 4.4K citations
Learning Word Vectors for Sentiment Analysis
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Razor: a low-power pipeline based on circuit-level timing speculation
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Engineering, Computer Engineering, Electrical Engineering +16