Advanced Electronic Materials · 2019 · 86 citations · 60 references
Non-volatile MemoryEngineeringMemory DesignEmerging Memory TechnologyStacked LayersComputer ArchitectureComputer MemoryResistive Random-access Memory3D MemoryMemoryMemory DeviceMemory DevicesMemory Density IncreaseElectrical EngineeringVertical ArchitectureElectronic MemoryFlash MemoryComputer EngineeringMagnetoresistive Random-access MemoryMemory ReliabilityHigh Bandwidth MemoryWill ComeTechnology
NAND flash drives portable devices, and the recent rise of vertical NAND (V‑NAND) has increased capacity and performance, but its density will eventually hit a limit, prompting interest in resistance‑based memories as a possible successor. This review examines the current state of V‑NAND, its impending density and performance limits, and the potential of resistance‑based memories to overcome them. The authors discuss strategies for integrating resistance‑based memories into vertical architectures, including material and structural approaches. They conclude that resistance‑based vertical memories hold promise for continued density and performance gains beyond V‑NAND.
Abstract The NAND flash memory serves as the key enabler of the flourishing of portable handheld information devices, such as the cellular phone. The recent upsurge in the sales of vertical NAND flash memory (V‐NAND) entails a further increase in the available information capacity at the edge devices and the servers with higher performance and lower power consumption compared with the magnetic hard‐disc drives. Nonetheless, there will certainly be an upper limit for the number of stacked layers, which will be the point at which further memory density increase will stop. While V‐NAND is a supreme outcome of semiconductor memory technologies, it still relies on conventional Si‐based materials. The newly explored memory materials and concepts, such as the resistance‐based memories, can therefore be an appealing contender to or successor of V‐NAND. In this review, the current state of V‐NAND is first briefly looked into, and then the eventual limitation of memory density increase and performance boost are discussed. Most importantly, the possible strategies of integrating the resistance‐based memories into the vertical architecture are then discussed. Finally, the outlook for such resistance‐based vertical memories is presented.
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