Submicrometer Top-Gate Self-Aligned a-IGZO TFTs by Substrate Conformal Imprint Lithography

Abstract

Thin-film transistors (TFTs) are the fundamental building blocks of today's display industry. To achieve higher drive currents and device density, it is essential to scale down the channel lengths of TFTs. To be able to fabricate short-channel TFTs in large volumes is also equally important in order to realize lower fabrication costs and higher throughput. In this paper, we demonstrate the application of substrate conformal imprint lithography (SCIL) to pattern top-gate (TG) self-aligned (SA) amorphous indium gallium zinc oxide TFTs down to channel length LG = 450 nm with good device scaling properties resulting in average field-effect mobility (μFE) = ~10 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ·V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> ·s <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> , V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> = ~ 0.5 V, and subthreshold swing (SS) = ~0.3 V/decade. The device performance as a function of channel length outlines the importance of dopant diffusion control for realizing submicrometer SA TFTs. The results demonstrate the compatibility of SCIL-based large-area patterning for the realization of submicrometer TG SA TFTs with a potential for high throughput.