A 3D mixed-mode ESD protection circuit simulation-design methodology

Abstract

Electrostatic discharge (ESD) is a serious IC reliability problem. On-chip ESD protection is used to protect ICs against ESD damage. This paper presents a real 3D mixed-mode ESD protection circuit simulation-design methodology for ESD design prediction. Practical ESD protection design examples in 0.35 /spl mu/m BiCMOS are given.