High performance cmos bulk technology using direct silicon bond (dsb) mixed crystal orientation substrates

Abstract

High performance 65-nm technology (L <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">poly</sub> =45nm, EOT=1.2nm) bulk CMOS has been demonstrated for the first time on mixed orientation substrates formed by using direct silicon bonded (DSB) wafers and a solid phase epitaxy (SPE) process. The pFET performance is improved by 35% due to hole mobility enhancement on (110) surfaces as compared to (100) surfaces. nFETs on SPE-converted (100) surfaces exhibit the same performance as those on (100) controls. Ring oscillators fabricated using DSB with SPE show improvements of more than 20% compared with control CMOS on (100) surfaces