Concepedia

Abstract

We show the single-event effect characteristics of a production-level embedded resistive memory. The resistive memory under investigation is a reduction-oxidation random access memory embedded inside a microcontroller. The memory structure consists of Ir top electrode, Ta <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5-δ</sub> /TaO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> metal-oxide, and TaN bottom electrode. The radiation testing focused on the resistive memory array and peripheral circuits, while other portions of the microcontroller were shielded against the ion beam. We found that the resistive memory array is hardened against heavy ion and pulsed-laser-induced bit upsets. However, the microcontroller is susceptible to single-event functional interrupts due to single-event upsets in the resistive memory peripheral control circuits, which comprise of CMOS elements. Furthermore, the resistive memory architecture is not susceptible to functional failures during write, which is problematic for flash memories due to radiation-induced charge pump degradation.

References

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