Scalable Neuron Circuit Using Conductive-Bridge RAM for Pattern Reconstructions

Abstract

A novel neuron circuit using a Cu/Ti/Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> -based conductive-bridge random access memory (CBRAM) device for hardware neural networks that utilize nonvolatile memories as synaptic weights is introduced. The neuronal operations are designed and proved using SPICE simulations with a Verilog-A device model based on the measured characteristics of the CBRAM device. The applicability of the neuron is demonstrated by constructing a neural network system and applying it to pattern reconstructions that can recall the original patterns from noisy patterns. With these CBRAM-based neurons, a reduction in the area and power of neuromorphic chips is expected in comparison with CMOS-only neuron implementations.