IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2015 · 34 citations · 10 references
EngineeringElectrical EngineeringAnalog ElectronicsInstrumentationVariable Rate TechnologyAnalog Integrated CircuitsCalibrationDc-dc ConversionDigital Signal ProcessingDistortion AnalysisMixed-signal Integrated Circuit DesignAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital Converter DesignAnalog-to-digital ConvertersDynamic Performance AnalysisNonlinearityNonlinearity CharacterizationSignal-to-noise Ratio
This brief reports a 120 MS/s 12-bit successive approximation register analog-to-digital converter (ADC). The conversion nonlinearity in a bridge digital-to-analog converter is analyzed, and its corresponding histogram-based ratio mismatch (HBRM) calibration is presented in detail. Verified by behavioral simulations as well as measured results, the solution improves both the dynamic performance and the static performance of the ADC. The measurement results demonstrate that the HBRM calibration effectively improves the signal-to-noise distortion ratio from 56.9 to 63.7 dB at dc input, with a sampling frequency of 120 MS/s.
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