IEEE Journal of Solid-State Circuits · 2008 · 87 citations · 27 references
EngineeringComputer EngineeringElectrical EngineeringLow-power DesignMicroelectronicsSemiconductor DevicesClock Distribution NetworksCmos Circuit DesignIntegrated Circuit DesignInterconnect TechnologyMixed-signal Integrated Circuit DesignRadio-frequency Integrated CircuitsCapacitive CircuitsCmos Radio-frequency CircuitsInterconnection TechniquesRadio Frequency Front-end IntegrationRf Cmos DesignSignal Propagation DelaySignalsTransceiver Design
A wireless interconnection scheme based on capacitive coupling provides mono- and bi-directional transmission capabilities for 3-D system integration. Chips are implemented in 0.13 mum CMOS technology and assembled face-to-face at die-level. RX-TX circuits are specifically designed for low-power functionality and the implementation takes advantage of the two different voltage thresholds that are available for the standard transistors in the CMOS process we used. The communication circuits are coupled via electrodes with an area down to 8 times 8 mum <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and this enables the vertical propagation of clock signals at 1.7 GHz, a propagation delay of 420 ps for general purpose signals and a throughput of more than 22 Mb/s/mum <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with 0.08 pJ/b energy consumption.
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