1995 · 10 citations · 18 references
EngineeringComputer EngineeringElectrical EngineeringCircuit TheoryLow-power DesignMicroelectronicsLow-power Digital Circuit DesignPower ManagementPower OptimizationPower-aware DesignTiming AnalysisTiming ModelingEnergy ConsumptionLower BoundsMulti-level Logic DesignMulti-level Logic SynthesisOperating ConditionsPower Modeling And EstimationPower-aware Logic SynthesisPower-aware Synthesis
This paper describes two techniques to quantify energy consumption of burst-modeasynchronous(clock-less) control circuits. The circuit specifications considered are extended burst-mode specifications, and the implementations are multi-level logic implementations whose outputs are guaranteed to be free of any voltage glitches (hazards). Both techniques use stochastic analysis to combine a small number of simulations in order to quantify average energy per external signal transition. The first technique uses N-valued simulation to derive mathematically tight upper and lower bounds of energy consumption. Using this technique we bound the effect of hazardsunder all possible operating conditions and environments for a given circuit. Additionally, to drive synthesis tools for low-power, we proposea second technique that uses fixed-delay simulation to derive a realistic estimate of energy consumption within our derived upper and lower bounds. We demonstrate the feasibility of both these techn...
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