Estimation of average switching activity in combinational and sequential circuits

TLDR

Switching activity in VLSI circuits is strongly influenced by gate delays and input correlation, especially in sequential designs where flip‑flop outputs create highly correlated combinational inputs. The study aims to estimate the average power dissipated in combinational and sequential VLSI circuits under random input sequences. A probabilistic method employing a general delay model and accounting for internal gate reconvergence is used to estimate switching activity and correlations in sequential circuits. The method automatically computes switching rates and the correlations between flip‑flop outputs. No additional information is provided.

Abstract

The authors address the problem of estimating the average power dissipated in VLSI combinational and sequential circuits, under random input sequences. Switching activity is strongly affected by gate delays and for this reason a general delay model is used in estimating switching activity. The method takes into account correlation caused at internal gates in the circuit due to reconvergence of input signals. In sequential circuits, the input sequence applied to the combinational portion of the circuit is highly correlated because some of the inputs to the combinational logic are flip-flop outputs representing the state of the circuit. Methods are presented to probabilistically estimate switching activity in sequential circuits. These methods automatically compute the switching rates and correlations between flip-flop outputs. >