A four-level storage 4-Gb DRAM

Abstract

A 4-Gb DRAM with multilevel-storage memory cells has been developed. This large memory capacity is achieved by storing data at four levels, each corresponding to two-bit-data storage in a single memory cell. The four-level storage reduces the effective cell size by 50%. A sense amplifier using charge coupling and charge sharing was developed for the four-level sensing and restoring. The sense amplifier uses a hierarchical bit-line scheme and operates in a time-sharing mode, thus reducing the sense amplifier area. A 4-Gb DRAM fabricated using 0.15-/spl mu/m CMOS technology measures 986 mm/sup 2/. The memory cell is 0.23 /spl mu/m/sup 2/. Its capacitance of 60 fF is achieved by using a high-dielectric-constant material BST.