Tadahiko Sugibayashi

Author

NEC (Japan)

Also Known As

Akira Mochizuki, T Sugibayashi, T. SUGIBAYASHI, T. Sugibayashi, Tadahiko SUGIBAYASHI, Tadahiko Sugibayashi

129

Publications

1.6K

Citations

H-Index

Concepts

All Affiliations

NEC (Japan)Tohoku University Spintronics Research Network of Japan Kyoto University Renesas Electronics (Japan)

About

Tadahiko Sugibayashi is an author at NEC (Japan) specializing in engineering, microelectronics, and computer engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	22	36	1.3K
2	Computer Engineering	18	30	1.1K
3	Computer Science	10	10	337
4	Applied Physics	7	7	172
5	Natural Sciences	1	1	12

Tadahiko Sugibayashi

Publications

1.4K

Citations

H-Index

Page 1

	Year	Citations
Nonvolatile Magnetic Flip-Flop for Standby-Power-Free SoCs Noboru Sakimura, Tadahiko Sugibayashi, Ryusuke Nebashi, IEEE Journal of Solid-State Circuits Hardware SecurityMagnetismLow-power ElectronicsElectrical EngineeringEngineering	2009	168
10.5 A 90nm 20MHz fully nonvolatile microcontroller for standby-power-critical applications Noboru Sakimura, Y. Tsuji, Ryusuke Nebashi, Low-power ElectronicsNon-volatile MemoryElectrical EngineeringNonvolatile MicrocontrollerEngineering	2014	104
Nonvolatile logic-in-memory array processor in 90nm MTJ/MOS achieving 75% leakage reduction using cycle-based power gating Masanori Natsui, Daisuke Suzuki, Noboru Sakimura, Hardware SecurityMtj-oriented Design FlowElectrical EngineeringNon-volatile MemoryEngineering	2013	71
Nonvolatile Logic-in-Memory LSI Using Cycle-Based Power Gating and its Application to Motion-Vector Prediction Masanori Natsui, Daisuke Suzuki, Noboru Sakimura, IEEE Journal of Solid-State Circuits Hardware SecurityRandom Logic LsiElectrical EngineeringMtj DeviceEngineering	2014	61
Low Current Perpendicular Domain Wall Motion Cell for Scalable High-Speed MRAM Shunsuke Fukami, K. Nagahara, Norikazu Ohshima, Symposium on VLSI Technology	2006	60
High-speed simulator including accurate MTJ models for spintronics integrated circuit design Noboru Sakimura, Ryusuke Nebashi, Y. Tsuji, EngineeringVlsi DesignComputer ArchitectureSimulationIntegrated Circuits Emphasis	2012	60
Nonvolatile Magnetic Flip-Flop for standby-power-free SoCs Noboru Sakimura, Tadahiko Sugibayashi, Ryusuke Nebashi, Hardware SecurityMagnetismLow-power ElectronicsElectrical EngineeringEngineering	2008	55
MRAM Cell Technology for Over 500-MHz SoC Noboru Sakimura, Tadahiko Sugibayashi, Takeshi Honda, IEEE Journal of Solid-State Circuits Non-volatile MemoryCell StructureEngineeringEmerging Memory TechnologyComputer Architecture	2007	53
20-nm magnetic domain wall motion memory with ultralow-power operation Shunsuke Fukami, Michihiko Yamanouchi, K.-J. Kim, Non-volatile MemoryEngineeringDevice SizeEmerging Memory TechnologyMagnetic Resonance	2013	52
Benchmark tests on adhesive strengths in butt, single and double lap joints and double-cantilever beams Kozo IKEGAMI, Tomoyuki Fujii, Haruo KAWAGOE, International Journal of Adhesion and Adhesives Structural IntegrityEngineeringDouble-cantilever BeamsStrength PropertyMechanical Engineering	1996	51

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