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Challenges for 3D IC integration: bonding quality and thermal management
94
Citations
5
References
2007
Year
Unknown Venue
EngineeringBonding QualityDevice IntegrationIntegrated CircuitsInterconnect (Integrated Circuits)Wafer Scale ProcessingAdvanced Packaging (Semiconductors)Ic IntegrationThermodynamicsLocal 3DElectronic PackagingMaterials Science3D Ic ArchitectureComputer EngineeringChip AttachmentWafer-to Wafer 3DHeat TransferMicroelectronics3D PrintingAdvanced PackagingThree-dimensional Heterogeneous IntegrationApplied PhysicsThermal Engineering3D Integration
In this contribution, two main challenges for wafer-to wafer 3D integration are investigated: bonding quality (including wafer-to-wafer alignment) and thermal management. The bonding process considered in this study is direct SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> hydrophilic bonding. It is shown that, after process optimization, lower than 1.5μm misalignment was achieved without significant bonding defects. In a second part, a 3D thermal modeling was done to estimate the temperature increase in a two-stratum 3D integration. Local (3D) and global (ID) modeling contribution to the maximum temperature are discussed. It is shown that, thermal resistance due to local 3D effects can be higher than ID thermal resistance. However, thermal effects seem to be manageable.
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