Concepedia

A 29-mm/sup 2/, 1.8-V-only, 16-Mb DINOR flash memory with gate-protected-poly-diode (GPPD) charge pump

Y. Miyawaki, Osatoshi Ishizaki, Y. Okihara, T. Inaba, F. Niita, M. Mihara, T. Hayasaka, K. Kobayashi, T. Omae, Hiroshi Kimura,

IEEE Journal of Solid-State Circuits · 1999 · 14 citations · 5 references

DOI

Concepts

EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyMemory DevicesMemory Subsystem DesignMetal-oxide-semiconductor Field-effect TransistorsBody EffectCharge Pump DesignCharge PumpingFlash MemoryFlash Memory DevicesMemory Circuit DesignNon-volatile Memory DesignPump Efficiency

Abstract

A 29-mm/sup 2/, 16-Mb divided bitline NOR (DINOR) flash memory is fabricated using 0.25-/spl mu/m triple-well three-layer-metal CMOS technology. Read access time is 72 ns at 1.8 V. A poly diode charge-pump technique improves pump efficiency and eliminates the body effect problem.

References

5

A 5-V-only operation 0.6- mu m flash EEPROM with row decoder scheme in triple-well structure

Akira Umezawa, S. Atsumi, M. Kuriyama et al. · IEEE Journal of Solid-State Circuits · 1992 · 148 citations

Engineering, Computer Engineering, Electrical Engineering +14

Lateral Polysilicon p‐n Diodes

M. Dutoit, F. Sollberger · Journal of The Electrochemical Society · 1978 · 55 citations

Engineering, Electrical Engineering, Materials Science +17

Negative heap pump for low voltage operation flash memory

M. Mihara, Yasushi Terada, M. Yamada · 2002 · 38 citations

Engineering, Computer Engineering, Electrical Engineering +15

A 3.3 V-only 16 Mb DINOR flash memory

S. Kobayashi, M. Mihara, Y. Miyawaki et al. · 2002 · 34 citations

Engineering, Computer Engineering, Electrical Engineering +16

A 5-V-only 16-Mb flash memory with sector erase mode

T. Jinbo, H. Nakata, K. Hashimoto et al. · IEEE Journal of Solid-State Circuits · 1992 · 34 citations

Engineering, Computer Engineering, Electrical Engineering +12