IEEE Journal of Solid-State Circuits · 1992 · 34 citations · 5 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesVlsi DesignCmos Circuit DesignIntegrated Circuit DesignMemory DevicesMemory Subsystem DesignFlash MemoryFlash Memory DevicesMemory Circuit DesignNon-volatile Cmos MemoryNon-volatile Memory Design
A 5-V-only 16-Mb CMOS flash memory with sector erase mode is described. An optimized memory cell with diffusion self-aligned drain structure and channel erase are keys to achieving 5-V-only operation. By adopting this erase method and row decoders to apply negative bias, 512-word sector erase can be realized. The auto chip erase time of 4 s has been achieved by adopting 64-b simultaneous operation and improved erase sequence. The cell size is 1.7 mu m*2.0 mu m and the chip size is 6.3 mm*18.5 mm using 0.6- mu m double-layer metal triple-well CMOS technology.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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A 5 volt only 16M bit flash EEPROM cell with a simple stacked gate structure
N. Ajika, M. Ohi, Hideaki Arima et al. · 2002 · 30 citations
Engineering, Computer Engineering, Electrical Engineering +17
A 5 V-only 256 kbit CMOS flash EEPROM
S. D'Arrigo, G. Imondi, G. Santin et al. · 2003 · 29 citations
Engineering, Computer Engineering, Electrical Engineering +15
A 60ns 16Mb Flash EEPROM With Program And Erase Sequence Controller
T. Nakayama, S. Kobayashi, Y. Miyawaki et al. · 1991 · 17 citations
Engineering, Computer Engineering, Electrical Engineering +12