Guarded evaluation

Abstract

Article Guarded evaluation: pushing power management to logic synthesis/design Share on Authors: Vivek Tiwari Dept. of Electrical Engineering, Princeton Univ. Dept. of Electrical Engineering, Princeton Univ.View Profile , Sharad Malik Dept. of Electrical Engineering, Princeton Univ. Dept. of Electrical Engineering, Princeton Univ.View Profile , Pranav Ashar C&C Research Labs., NEC C&C Research Labs., NECView Profile Authors Info & Claims ISLPED '95: Proceedings of the 1995 international symposium on Low power designApril 1995 Pages 221–226https://doi.org/10.1145/224081.224120Online:23 April 1995Publication History 53citation518DownloadsMetricsTotal Citations53Total Downloads518Last 12 Months4Last 6 weeks1 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access