José Monteiro

Precomputation-based sequential logic optimization for low power

M. Alidina, José Monteiro, Srinivas Devadas et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1994 · 310 citations

Low Power, Logic Synthesis, Engineering +14

Retiming sequential circuits for low power

José Monteiro, Srinivas Devadas, Abhijit Ghosh · International Conference on Computer Aided Design · 1993 · 165 citations

Hardware Security, Low-power Electronics, Electrical Engineering +14

Power estimation methods for sequential logic circuits

Chi-Ying Tsui, José Monteiro, Massoud Pedram et al. · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1995 · 146 citations

Hardware Security, Logic Synthesis, Engineering +14

Exact and Approximate Algorithms for the Optimization of Area and Delay in Multiple Constant Multiplications

Levent Aksoy, Eduardo Costa, Paulo Flores et al. · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2008 · 123 citations

Mathematical Programming, Numerical Analysis, Large-scale Global Optimization +25

Retiming sequential circuits for low power

José Monteiro, Srinivas Devadas, Abhijit Ghosh · Proceedings of 1993 International Conference on Computer Aided Design (ICCAD) · 2002 · 104 citations

Hardware Security, Low-power Electronics, Electrical Engineering +14