Computer · 2008 · 85 citations · 12 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysReconfigurable ComputingConfigurable Logic BlocksField-programmable Gate Array ArchitectureFpga ArchitectureFpga Programming ModelsHardware AccelerationRun-time ReconfigurationDynamic Binary TranslationField-programmable Gate Array AccelerationField-programmable Gate Array ReconfigurationField-programmable Gate Arrays (Fpgas)Reconfiguration Of Field-programmable Gate ArraysSoftware-to-hardware CompilationWarp-level Programming
Warp processing dynamically and transparently transforms an executing microprocessor's binary kernels into customized field-programmable gate array (FPGA) circuits, commonly resulting in 2X to 100X speedup over executing on microprocessors. A new architecture and set of dynamic CAD tools demonstrate warp processing's potential.
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UQBT: adaptable binary translation at low cost
Cristina Cifuentes, M. Van Emmerik · Computer · 2000 · 129 citations
Dynamic and transparent binary translation
Michael Gschwind, Erik Altman, S. Sathaye et al. · Computer · 2000 · 114 citations