Software-to-hardware Compilation

Software-To-Hardware Compilation is a programming model that transforms high-level software code into optimized hardware configurations for execution on field-programmable gate arrays, distinguished by its automation of hardware design generation from software abstractions without requiring explicit hardware description.

200

Publications

7.9K

Citations

712

Authors

197

Institutions

Publications per year

2017–2026

37

Authors

712

  1. FV
    Frank Vahid

    University of California, Riverside, United States

    9 publications · 448 citations

    9

    h-index

  2. RL
    Roman Lysecky

    University of Arizona, United States

    6 publications · 323 citations

    6

    h-index

  3. TC
    Tomasz Czajkowski

    University of Toronto, Canada

    5 publications · 367 citations

    5

    h-index

  4. SD
    Stephen D. Brown

    University of Toronto, Canada

    4 publications · 133 citations

    4

    h-index

  5. WN
    Walid Najjar

    University of California, Riverside, United States

    4 publications · 223 citations

    4

    h-index

1–5 of 712

Venues

  1. Computer

    7 publications · 447 citations

    7

    h-index

  2. IEEE Micro

    5 publications · 175 citations

    5

    h-index

  3. Design, Automation, and Test in Europe

    Conference · 3 publications · 127 citations

    3

    h-index

  4. Microprocessors and Microsystems

    MICPRO · 3 publications · 85 citations

    3

    h-index

  5. 3

    h-index

1–5