Software-to-hardware Compilation
Software-To-Hardware Compilation is a programming model that transforms high-level software code into optimized hardware configurations for execution on field-programmable gate arrays, distinguished by its automation of hardware design generation from software abstractions without requiring explicit hardware description.
200
Publications
7.9K
Citations
712
Authors
197
Institutions
Publications per year
2017–2026
37
Parents
200
MLIR: Scaling Compiler Infrastructure for Domain Specific Computation
Chris Lattner, Mehdi Amini, Uday Bondhugula et al. · 2021 · 502 citations
From opencl to high-performance hardware on FPGAS
Tomasz Czajkowski, Utku Aydonat, Dmitry Denisenko et al. · 2012 · 239 citations
Engineering, Computer Science, High-performance Computing +15
Joachim Keinert, Martin Streubühr, Thomas Schlichter et al. · ACM Transactions on Design Automation of Electronic Systems · 2009 · 236 citations
1–5 of 200
712
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197
University of California, Riverside
Riverside, United States
9 h-index
26 publications
955 citations

University of Toronto
Toronto, Canada
8 h-index
39 publications
1.4K citations

Imperial College London
London, United Kingdom
7 h-index
14 publications
297 citations
University of Illinois Urbana-Champaign
Urbana, United States
7 h-index
20 publications
953 citations
University of California, Berkeley
Berkeley, United States
6 h-index
20 publications
999 citations
Carnegie Mellon University
Pittsburgh, United States
6 h-index
21 publications
636 citations
University of California, Irvine
Irvine, United States
5 h-index
10 publications
527 citations
Stanford University
Stanford, United States
4 h-index
10 publications
744 citations
1–8 of 197
7 publications · 447 citations
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5 publications · 175 citations
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Conference · 3 publications · 127 citations
3
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MICPRO · 3 publications · 85 citations
3
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3 publications · 78 citations
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