Factors affecting the growth of an integrated Ga1−<i>x</i>In<i>x</i>As/InP PIN–FET by molecular beam epitaxy

Abstract

A combination of electrical and optical properties makes GaInAs lattice matched to InP a suitable material for the fabrication of an integrated PIN-FET receiver for use in telecommunications applications at 1.55 μm. As steps towards integration, the individual devices in such a receiver have been fabricated using molecular beam epitaxy (MBE) material. With the use of careful substrate cleaning it has been demonstrated that significant improvements in the epitaxial quality of GaInAs layers can be produced. JFETs have been fabricated from this material and using a novel self-aligning source/drain contact method, source contact to channel resistance has been minimized by the formation of submicron source to gate spacings. These devices had a dc transconductance of 60 mS/mm for a 3 μm gate length. Similarly PIN diodes have been fabricated. The high field region of the device contains low doped GaInAs, Nd–Na approximately 5×1015 cm−3 with corresponding μ300&amp;gt;9000 cm2 V−1 s−1. For monolithic integration, the two components require an intervening isolation region. The choice of isolation material as well as the optimization of growth conditions for the integrated structure together with preliminary device results are discussed.