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Co-integration of 2 mV/dec Subthreshold Slope Impact Ionization MOS (I-MOS) with CMOS
23
Citations
9
References
2006
Year
Electrical EngineeringIon ImplantationEngineeringPhysicsNanoelectronicsBias Temperature InstabilityApplied PhysicsClassical CmosConventional Mosfets HitsIon EmissionSilicon On InsulatorMicroelectronicsBeyond CmosImpact Ionization MosfetSemiconductor Device
The reduction of the subthreshold slope S in conventional MOSFETs hits against the diffusion phenomena which limits S to 60 mV/dec at 300K. This paper deals with a new type of device, the impact ionization MOSFET (I-MOS), which allows few mv/dec subthreshold slopes. For the first time, classical CMOS have been co-integrated with complementary I-MOS (CI-MOS) on silicon-on-insulator wafers (SOI). Using a standard CMOS process, we have obtained fully functional n & p MOSFETs, and n & p I-MOS with S respectively down to 6 and 2 mV/dec
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