2002 · 37 citations · 8 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureField-programmable Gate ArraysParallel ComputingField-programmable Gate Array ArchitectureFpga ArchitectureParallel ArchitecturesParallel Computer ArchitectureArea EfficiencyArithmetic Logic Unit ArchitectureArithmetic Unit DesignMultiplier DesignMultipliersParallel Integer Arithmetic
Comparison of five different 32-bit integer multipliers is done for various performance measures. Multipliers included in comparison are the array multiplier, modified Booth (radix-4) multiplier, optimized Wallace tree multiplier, combined modified Booth-Wallace tree multiplier and twin pipe serial parallel multiplier. Comparison is based on synthesis results obtained by synthesizing all multiplier architectures towards FPGA.
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