Concepedia

D. Villeger

DV

6

Publications

573

Citations

6

H-Index

1993

Active since

Affiliations

University of California, Davis(Current)

UniLaSalle Amiens (ESIEE-Amiens)

École Normale Supérieure - PSL

D. Villeger is an author at University of California, Davis specializing in engineering, computer engineering, and parallel computing.

Top concepts

EngineeringComputer EngineeringParallel ComputingComputer ArchitectureComputer ScienceSignal ProcessingParallel Complexity TheoryVlsi DesignMicroelectronicsParallel Programming

Publications per year

1993–2002

6

Publications

6

A method for speed optimized partial product reduction and generation of fast parallel multipliers using an algorithmic approach

Vojin G. Oklobdzija, D. Villeger, Shen-Iuan Liu · IEEE Transactions on Computers · 1996 · 360 citations

Numerical Analysis, Engineering, Vlsi Design +21

Improving multiplier design by using improved column compression tree and optimized final adder in CMOS technology

Vojin G. Oklobdzija, D. Villeger · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 1995 · 114 citations

Engineering, Vlsi Design, Computer Architecture +19

Evaluation of Booth encoding techniques for parallel multiplier implementation

D. Villeger, Vojin G. Oklobdzija · Electronics Letters · 1993 · 35 citations

Engineering, Booth Encoding Technique, Computer Architecture +16

Analysis of Booth encoding efficiency in parallel multipliers using compressors for reduction of partial products

D. Villeger, Vojin G. Oklobdzija · 2002 · 31 citations

Engineering, Booth Encoding Technique, Multi-rate Signal Processing +16

An integrated multiplier for complex numbers

Vojin G. Oklobdzija, D. Villeger, T. Soulas · The Journal of VLSI Signal Processing Systems for Signal Image and Video Technology · 1994 · 17 citations

Engineering, Validated Numerics, Complex Numbers +4

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