Body tie placement in CMOS/SOI digital circuits for transient radiation environments

Abstract

The authors present criteria for the use of body ties to reduce or eliminate parasitic bipolar effects important in the transient radiation response of SOI/CMOS devices. A theoretically derived body tie spacing rule is verified using both TRIGSPICE and PISCES II with photocurrent injection capabilities. The tie spacing rule, which is independent of feature size within bounds, provides a simple guideline for design/layout for CMOS/SOI digital circuits for harsh transient radiation environment.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>