Publication | Closed Access
Low temperature, low profile, ultra-fine pitch copper-to-copper chip-last embedded-active interconnection technology
18
Citations
8
References
2010
Year
Unknown Venue
Electrical EngineeringChip-scale PackageEngineeringLow ProfileAdvanced Packaging (Semiconductors)MicrofabricationChip On BoardMechanical EngineeringComputer EngineeringFailure AnalysisChip AttachmentContinuous DriveInterconnection NetworkElectronic PackagingMicroelectronicsFlip Chip Packages3D PrintingLow Temperature
In a continuous drive to achieve low form-factor packages, chip-to-package interconnections have evolved from the conventional solders to a more hybrid technology consisting of copper and solder. However, scaling down the bump pitch to increase the interconnect density poses serious reliability and yield issues. In the previous, a low-profile interconnect architecture, ~20μm total height, was demonstrated comprising of copper-to-copper interconnection and novel adhesive materials. This paper focuses on: (1) design and fabrication of test vehicles to assess the robustness of the interconnect architecture, (2) assembly process development for copper-to-copper interconnections, and (3) reliability and failure analysis of the interconnection. Excellent reliability results are demonstrated under thermal cycling test (TCT) using non-conductive films (NCF) as adhesive. This interconnect scheme is also shown to perform well with different die sizes, die thicknesses and with embedded dies thus offering a great potential for integration with flip chip packages as well as with chip-last embedded active chips in organic substrates. A simple and reliable low-cost and low-temperature direct Cu-Cu bonding is thus demonstrated for the first time.
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