Automatic synthesis of extended burst-mode circuits. II. (Automatic synthesis)

K.Y. Yun, David L. Dill

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1999 · 50 citations · 21 references

Concepts

TL;DR

The extended burst‑mode design style covers a wide spectrum of sequential circuits ranging from delay‑insensitive to synchronous. The study introduces a new design style called extended burst‑mode. The implementation uses standard CMOS logic to produce low‑latency, hazard‑free outputs and incorporates automated algorithms for hazard‑free state assignment, minimization, and critical‑rare‑free encoding. The authors successfully synthesize complex asynchronous finite state machines and gray‑area circuits that existing methods cannot handle, and demonstrate performance improvements through experimental comparisons with competing techniques.

Abstract

We introduce a new design style called extended burst-mode. The extended burst-mode design style covers a wide spectrum of sequential circuits ranging from delay-insensitive to synchronous. We can synthesize multiple-input change asynchronous finite state machines and many circuits that fall in the gray area (hard to classify as synchronous or asynchronous) which are difficult or impossible to synthesize automatically using existing methods. Our implementation of extended burst-mode machines uses standard CMOS logic, generates low-latency outputs, and guarantees freedom from hazards at the gate level. In Part II, we present a complete set of automated sequential synthesis algorithms: hazard-free state assignment, hazard-free state minimization, and critical-rare-free state encoding. Experimental data from a large set of examples are presented and compared to competing methods whenever possible.

References

21