Photoresist coating and patterning for through-silicon via technology

Abstract

Three-dimensional (3D) integration requires through-wafer interconnects, i.e. an integration of electrical connections from one side of the wafer to the other side. In some cases, it involves the lithographic patterning of through-Si via (TSV). For this step, a conformal coating of a resist layer is necessary. In this paper, we present two potential photoresist coating methods for coating a wafer with TSV: spray coating and electrodeposition (ED) of the photoresist. Lithographic patterning inside the TSV is also investigated. Some parameters that influence the pattern definition, such as large gap exposure, resist thickness and via size, are identified and evaluated.