Interfacial-Layer-Driven Dielectric Degradation and Breakdown of HfSiON/SiON Gate Dielectric nMOSFETs

Abstract

This letter describes the dielectric degradation and breakdown characteristics of HfSiON/SiON gate dielectric nMOSFETs using the stress-induced leakage current (SILC) analysis. The nMOSFETs show progressive breakdown (PBD) under substrate injection stress, and its characteristic changes as the stress voltage increases, from slow PBD (s-PBD) only, then to a combination of s-PBD and fast PBD (f-PBD), and finally to f-PBD only. It is found that the SILC of nMOSFETs is caused by trap-assisted tunneling mainly through the preexisting deep traps of the high- <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i> layer and the stress-induced traps of the interfacial layer (IL). The stress-induced defects under substrate injection stress are generated within the IL rather than the high- <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">k</i> layer, and the time-dependent dielectric breakdown of the nMOSFETs is driven by the degradation of the IL.