Publication | Closed Access
Hot-carrier stressing damage in wide and narrow LDD NMOS transistors
17
Citations
15
References
1989
Year
Electrical EngineeringHot-carrier StressingEngineeringPhysicsNanoelectronicsNanotechnologyStress-induced Leakage CurrentApplied PhysicsBias Temperature InstabilitySingle Event EffectsCharge Carrier TransportMicroelectronicsCharge TransportNmos TransistorsGate WidthSemiconductor Device
Hot-carrier stressing has been carried out on LDD (lightly doped drain) NMOS transistors with gate width as a variable. It is found that the damage is qualitatively different between the wide and narrow devices. To investigate the poststress damage, use is made of a hole injection phase to neutralize any trapped charge. It is shown that the narrow devices degrade predominately by charge trapping, whereas the wider devices show interface-state creation. It is further shown that the localization of the hot-carrier damage is different, being extended towards the source for electron trapping in the narrow devices, whereas the wide devices show interface states localized at the drain junction edge. It is suggested that the mechanical constraints arising from the proximity of the bird's-beak structure are responsible for the electron-trapping behavior.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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