IEEE Transactions on Nuclear Science · 2003 · 24 citations · 10 references
EngineeringComputer EngineeringComputer ScienceFault ToleranceFault-tolerant ComputingMicroelectronicsEmbedded Memory BlocksFault InjectionHardware Fault ToleranceCache Fault InjectionCache MemoryFault Injection In MicroprocessorsFault-tolerant ArchitectureHardware Fault InjectionMemory Fault ToleranceMicroarchitectural Fault InjectionSingle Event Upset Modeling
Cache memories embedded in most of complex processors significantly contribute to the global single event upset-induced error rate. Three different approaches allowing the study of this contribution by fault injection are investigated in this paper.
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Makoto Matsumoto, Takuji Nishimura · ACM Transactions on Modeling and Computer Simulation · 1998 · 5.7K citations