Impact of scaling on soft-error rates in commercial microprocessors

Abstract

The impact of technology scaling and logic design on the /spl alpha/-particle and neutron-induced soft-error rate (SER) of Alpha microprocessors (HP Alpha Development Group, Shrewsbury, MA) has been investigated. Our results indicate that the reduced charge-collection efficiency at the device level as well as circuit- and system-level mitigation techniques have successfully combatted the scaling trend of the critical charge. Process scaling and the introduction of flip-chip packaging have resulted in a nonnegligible contribution of /spl alpha/-particle-induced failure rates to the core-logic SER, whose overall importance has increased considerably since the implementation of error-correction codes.