Predicting error rate for microprocessor-based digital architectures through C.E.U. (Code Emulating Upsets) injection

Abstract

This paper investigates an approach to study the effects of upsets on the operation of microprocessor-based digital architectures. The method is based on the injection of bit-flips, randomly in time and location by using the capabilities of typical application boards. Experimental results, obtained on programs running on two different digital boards, built around an 80C51 microcontroller and a 320C50 Digital Signal Processor, illustrate the potentialities of this new strategy.