IEEE Journal of Solid-State Circuits · 2008 · 81 citations · 5 references
EngineeringComputer EngineeringComputer ScienceComputer ArchitectureLow-power DesignSemiconductor DevicesMemory DevicesMemory Subsystem DesignFlash MemoryFlash Memory DevicesFlash Memory StorageLatchesMemory Circuit DesignNand Flash MemoryNon-volatile Memory DesignThroughput
A 16 Gb 16-level-cell (16LC) NAND flash memory using 70 nm design rule has been developed . This 16LC NAND flash memory can store 4 bits in a cell which enabled double bit density comparing to 4-level-cell (4LC) NAND flash, and quadruple bit density comparing to single-bit (SLC) NAND flash memory with the same design rule. New programming method suppresses the floating gate coupling effect and enabled the narrow distribution for 16LC. The cache-program function can be achievable without any additional latches. Optimization of programming sequence achieves 0.62 MB/s programming throughput. This 16-level NAND flash memory technology reduces the cost per bit and improves the memory density even more.
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A 70nm 16Gb 16-level-cell NAND Flash Memory
Noboru Shibata, Maejima Hiroshi, K. Isobe et al. · 2007 · 62 citations
A 146mm/sup 2/ 8Gb nand flash memory with 70nm CMOS technology
T. Hara, Koichi Fukuda, K. Kanazawa et al. · 2005 · 21 citations
Engineering, Computer Engineering, Electrical Engineering +17