IEEE Journal of Solid-State Circuits · 1989 · 11 citations · 7 references
EngineeringComputer EngineeringElectrical EngineeringMemoryMicroelectronicsSemiconductor DevicesCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyLow-noise Circuit DesignMixed-signal Integrated Circuit DesignNoise In Electronic DevicesNoise In Semiconductor DevicesInterface NoiseInterferenceLow-noise DesignMemory Circuit DesignNoise AnalysisNoise GenerationNoise InterferenceSense Amplifier Design
Dynamic RAM (DRAM) data-line interface noise generated during amplification, the key problem in designing 16 Mbit and higher DRAMs, is investigated. It is reported that: (1) in the half-V/sub cc/ approach, specific combinations of signal types (high and low) and CMOS sense-amplifier operating sequences cause interference noise during amplification; (2) interference noise exists in sense amplifiers; and (3) the noise results in a detrimental effect on data holding time characteristics. The interference noise is overcome by a transposed amplifier structure combined with a transposed data-line structure.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
7
Circuit technologies for 16Mb DRAMs
T. Mano, Takeshi Matsumura, J. Yamada et al. · 1987 · 37 citations
Engineering, Computer Engineering, Electrical Engineering +14
A Twisted Bit Line Technique for Multi-Mb Drams
Yoshihara, Hidaka, Fujishima · 1988 · 32 citations
Engineering, Computer Engineering, Electrical Engineering +8