Statistics
Publications
9
Citations
243
H-Index
9
Active since
1978
Affiliations
T. Mano is an author at NTT (Japan) specializing in memory circuit design, cmos circuit design, and electrical engineering.
Publications per year
1978–1987
9
9
Circuit technologies for 16Mb DRAMs
T. Mano, Takeshi Matsumura, J. Yamada et al. · 1987 · 37 citations
Engineering, Computer Engineering, Electrical Engineering +14
Circuit techniques for a VLSI memory
T. Mano, J. Yamada, Junpei Inoue et al. · IEEE Journal of Solid-State Circuits · 1983 · 33 citations
Engineering, Computer Engineering, Electrical Engineering +17
A submicron VLSI memory with a 4b-at-a-time built-in ECC circuit
J. Yamada, T. Mano, Junpei Inoue et al. · 1984 · 29 citations
Engineering, Computer Engineering, Electrical Engineering +15
Submicron VLSI memory circuits
T. Mano, J. Yamada, Junpei Inoue et al. · 1983 · 27 citations
Engineering, Computer Engineering, Electrical Engineering +11
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