J. Yamada - Concepedia

Author

J. Yamada

NTT (Japan)

Also Known As

J. Yamada, JUNZO YAMADA, Junzo Yamada

Publications

2.2K

Citations

H-Index

Concepts

All Affiliations

NTT (Japan)NTT Basic Research Laboratories Meisei University

About

J. Yamada is an author at NTT (Japan) specializing in engineering, electrical engineering, and computer engineering.

Top Concepts

#	Concept	H-Index	Publications	Citations
1	Engineering	17	23	2.1K
2	Electrical Engineering	16	22	2.1K
3	Computer Engineering	15	18	2K
4	Computer Science	3	3	146
5	Antenna	1	1	24

J. Yamada

Publications

2.1K

Citations

H-Index

Page 1

	Year	Citations
1-V power supply high-speed digital circuit technology with multithreshold-voltage CMOS S. Mutoh, T. Douseki, Y. Matsuya, IEEE Journal of Solid-State Circuits Low-power ElectronicsElectrical EngineeringEngineeringVlsi DesignHigh-speed Electronics	1995	1.1K
A 1-V high-speed MTCMOS circuit scheme for power-down application circuits Satoshi Shigematsu, S. Mutoh, Y. Matsuya, IEEE Journal of Solid-State Circuits Low-power ElectronicsHardware SecurityElectrical EngineeringEnergy HarvestingLsi Chip	1997	245
A 20 kbit associative memory LSI for artificial intelligence machines Takeshi Ogura, J. Yamada, Setsuo Yamada, IEEE Journal of Solid-State Circuits Artificial IntelligenceEngineeringAdvanced ComputingArtificial Intelligence MachinesComputer Architecture	1989	75
A 1-V high-speed MTCMOS circuit scheme for power-down applications Satoshi Shigematsu, S. Mutoh, Y. Matsuya, Low-power ElectronicsHardware SecurityElectrical EngineeringEngineeringVlsi Design	2002	74
A 1 V multi-threshold voltage CMOS DSP with an efficient power management technique for mobile phone application S. Mutoh, Satoshi Shigematsu, Y. Matsuya, Low-power ElectronicsHardware SecurityElectrical EngineeringPower-aware ComputingV Dsplsi	2002	73
1 V power supply, low-power consumption A/D conversion technique with swing-suppression noise shaping Y. Matsuya, J. Yamada IEEE Journal of Solid-State Circuits Low-power ElectronicsV Power SupplyElectrical EngineeringEngineeringData Converter	1994	72
A 1-V multithreshold-voltage CMOS digital signal processor for mobile phone application S. Mutoh, Satoshi Shigematsu, Y. Matsuya, IEEE Journal of Solid-State Circuits Low-power ElectronicsElectrical EngineeringPower-aware ComputingEngineeringAnalog-to-digital Converter	1996	71
1V high-speed digital circuit technology with 0.5μm multi-threshold CMOS S. Mutoh, T. Douseki, Y. Matsuya, Low-power ElectronicsMulti-threshold CmosElectrical EngineeringEngineeringHigh-speed Electronics	2002	56
2-GHz RF front-end circuits in CMOS/SIMOX operating at an extremely low voltage of 0.5 V Mitsuru Harada, Takehiko Tsukahara, Junichi Kodate, IEEE Journal of Solid-State Circuits Low-power ElectronicsElectrical EngineeringEngineeringRadio FrequencyHigh-frequency Device	2000	43
Selector-line merged built-in ECC technique for DRAMs J. Yamada IEEE Journal of Solid-State Circuits Hardware SecurityBuilt-in Ecc TechniqueEngineeringElectronic Design AutomationHigh-speed Error Correction	1987	42

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